Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Yes, you can run at reduced voltage. The lower end will
be set more by design style (folded vs tall stacks) but
op amps seldom use minimum channel length so the only
real penalty is the thicker gate ox / lower gm of devices.
The worst case upper / lower voltages, are between you
and your customer / application. Getting a wide supply
range might be a "feature", and for portables the lower
end may want to be sub-cell-voltage for maximum battery
life. You have to determine the application and what it
wants, to arrive at the "datasheet".
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.