The SPI interface can easily be implmented in software by bit-bashing. If the 8051 is going to be the master, then you do not need to use the interrupt. Simply start shifting data in/ out as you wish. The timing is not critical, as long as you do not exceed the maximum speed of any of the slaves (I find it hard to believe you could).
If the 8051 is going to be a slave, then use the external interrupt line to act as /SS. Then you need to read/ output the data right after the correct edge of the clock. Timing in this case is really critical, since the master may be very fast. And you do not output the data on the edge of the clock, but slightly after, due to software overhead. It is still very much doable, just make sure that the masters do not operate at speeds too high for the 8051.
Another solution involves the use of an actual shift register that the 8051 can read and write. The master shifts data in/out of that register and the micro reads/ writes data parallel. (This is pretty much the way SPI actually operates). Implementing it this way would create many more hardware problems, though.