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reading from files using verilog-A

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eng_Semi

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I search a lot to know where to post this topic, but finally I posted it here.

Is there any commands which can let me read a data pattern from a file using verilog-A ?

Plz reply me as soon as possible.
 

eng_Semi said:
I search a lot to know where to post this topic, but finally I posted it here.
Plz reply me as soon as possible.

I think it is better to write your topic in the PLD, SPLD, CPLD, FPGA Design forum.. there you may find more help ..

Rabbena yewffa2ak .. :)
 

ahmad_abdulghany said:
I think it is better to write your topic in the PLD, SPLD, CPLD, FPGA Design forum.. there you may find more help ..

Can I resend this topic there or I will be warned ? :(
 

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