read delay and write delay in SRAM cell

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electronics20

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Dear
I want to measure the read delay and write delay of an SRAM cell 6T in HSPICE, Would you please help me to do this?
Many Thanks in advance
 

In my opinion and limited experience, the intracell "delay" is
of almost no value / consequence; the precharge and sense
phases dominate read time, I expect the write driver delay
(with its large chip-scale loading) dwarfs the cell internal
delay and so on.

Now this request is likely academic (homework) so perhaps
practicality doesn't enter into it.
 
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