Hi
here are some papers about CP's design , i think the first two are the most important.
[1] W. Rhee, “Design of High-Performance CMOS Charge-Pumps in Phase LockedLoops”, in Proc. ISCAS, vol.2, pp 545 – 548, 1999
[2] Mohamed EL.H. & F. Yuan“ Architecture and design consideration of
CMOS Charge pumps for PLL’s”,Ryerson Uni.
[3] Jeffrey S. Pattavina, “Charge Pump PLL Analysis “, August 06,2001
[4] B. Razavi “Design of Analog Integrated Circuits ”McGraw-Hill ,PP 566-567,2001
[5] Esdras Juárez-Hernández & Alejandro D. Sánchez “A Novel CMOS Charge-pump Circuit With Positive Feedback For PLL Applications” Proc. ICECS, 2001
contact me if you need more help or if you couldnot download them,
best regards,..
Mohamed Mohsen