Rds(on) or 1 by gds?

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AMSA84

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Hi guys,

I am doing a MOS Switch characterization and I am now in the part where I have to plot Rds(on) VS Vgs. I have access to all the transistor dc operating point. (I save them in a separated file).

In those operating point I can see the gds and the Ron. Which one is the correct one to characterize the Rds(on)?

Thanks in advance.
 

Hi AMSA84,

In those operating point I can see the gds and the Ron. Which one is the correct one to characterize the Rds(on)?

Ron is the write one if you want to measure the ON resistance of a MOS (switch characterization). Ron = Vds / Ids
1/gds is the small signal resistance. If you are interested in gain = gm * ro , then ro is the small signal resistance. ro = 1/gds

Hope this will help ...
 
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    FvM

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Rdson is a large signals parameter, Vds/Ids for a specific operation point in ohmic region. Although various small signal measurements probably end up in similar numerical values due to the weak non-linearity of Rdson, they are not the same.

So if you want plot Rdson, measure it.
 

Hi AMSA,

As correctly pointed out by FvM.... If you want to be sure about the ON resistance of a MOS then check Vds/Ids.
You can do a small experiment to check what is what:
1) For Ron (on resistance of MOS): Calculate Vds / Ids and compare with Rds(on). Hopefully they will be same.
2) Bias the MOS in saturation: Compare Vds / Ids, Rds(on) and 1/gds .... Hopefully 1/gds >> (Vds/Ids) = Rds(on)
1/gds is generally in Momhs and Rds(on) in Komhs

Note: 1/gds value depends on the L and Ids of the MOSFET ....

Hope this will help ...
 

Hi and thanks for the tips.

I have another question. Since the technology that I am using is the UMC 130nm, the nominal voltage is 1.2V.

What I' like to know is:

Taking into account that I am designing a dc-dc converter, how high can be the input voltage? What matters is how high is the input voltage (that cannot exceed 1.2V) or is the difference between the drain and source terminals? For example, for an high side MOSFET, I can have 2.2V in the source terminal and 1V at the drain (output voltage in the output filter. This makes 1.2V between the terminals, so there is no problem because I am not exceeding the maximum voltage for the technology. Am I right?

On the other hand, if I have 3V in the source, and 1.1V or 1.2V, the difference is 1.8V which exceeds the technology voltage. I cannot have this kind of setup?

However, when I was reading a paper related with my work, I read "(...)switches are implemented using stacked transistors, enabling the input voltage to be higher that the nominal technology supply voltage of 1.2V".

I am confused. What is meant by stacked transistors?

Kind regards and thanks in advance.
 
Last edited:

Hi AMSA84,

I don't know whether UMC 130nm has only 1.2V devices or not. Please check you technology docs you may have devices supporting higher voltages like 2.5V or 3.3V.

You next question (if i generalize) is about using a low voltage device with high voltage supply. Again, I will say that check your technology documents, it should have information related to device voltage and reliability.
In general not more that +/- 10% of the specified voltage can be tolerated. So if you can ensure that voltage between any two terminal is not exceeding the specified value you can use it.

Hope this will help ...
 

Hi Hazra and thanks for the reply.

My technology supports 1.2V and 3.3V transistors (https://www.umc.com/english/pdf/0.13dm.pdf). I intend to characterize both types of transistors specially to see what are the Rds(on) values.

If the 3.3V transistors have a higher ON resistance compared to the 1.2V transistor, it is more wise to use 1.2V transistors. So, if the I'll use the 1.2V transistors and have a power supply with a higher voltage than that the technology allows I need to find a way to use those 1.2V transistors supporting an higher input voltage. From what I have read one can use stacked transistors, but I have not much knowledge about this.

What you think?

EDIT:

"In general not more that +/- 10% of the specified voltage can be tolerated. So if you can ensure that voltage between any two terminal is not exceeding the specified value you can use it." So why there are people using stacked transistors? When I was reading a paper related with my work, I read "(...)switches are implemented using stacked transistors, enabling the input voltage to be higher that the nominal technology supply voltage of 1.2V".

I am confused. What is meant by stacked transistors?
 
Last edited:

Hi guys,

I forgot to ask something else. How much would be advisable to have in the Vds of a switch? How severely can affect the performance of the switch?
 

Hi,
if you are going to use a MOS as a switch.. you first turn on and cut offf the MOS to operate as a perfect switch..

So it depends on Vgs not on Vds.. Vgs > Vgs-vth your MOS becomes ON.. and how high your Vgs decides the Performence of the MOS as a switch...

So, Vds should be low when the MOS switch is ON
Vds should be as high as possible when MOS is OFF

thanks..
 

Hi kenambo and thanks for the hep but regarding what you said I already knew that.

THe main problem that I am facing now is on which method should I rely on to extract the Rds(on) from the MOSFET. I have been searching and I came up with two or three methods but I don't know which one would be more reliable.

One of them consists on saving the operating points of the transistor into a file and then through the Browse of ADE I can get access to all the parameters of the transistors (including for example vt, cgs, etc) including the Ron. It's pretty simple to plot the Ron, we need just to click on the parameter and the ADE makes the plot. In this method, which is the simplest one, I don't know if it is consistent and reliable.

The other method is computing the Vds/Id for each point. But how reliable is the result that we'll get?

Kind regards.
 

Hi,
you are varying your input VGS voltage and calculating the Rds.. Am i right..

it is beeter to sweep the Vgs and plot the vds and the Ids .. then make the division..

thanks
 

Yeap, that's what I though and is how I am doing now. By the way, make sense to calculate the Ron with an AC analysis? Since the mosfet will be switching.

Thanks in advance.

Regards.
 

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