RC oscillator design cadence

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hi i attached my three stage amplifier and RC circuit.

and i tried my loop gain with the amplifier input impedence.

thanks.

 

O.K. the amplifier is inverting, corresponding to 180 degree phase (not considering amplifier poles and zeros), so the RC phase shift must be about 180 degree as well. LvW already explained this in post #16.

I'm not quite sure about your exact question.
 

kenambo - OK, I see that you are using three inverting stages. That`s correct, however don`t you think that one amplification stage should be sufficient for a gain of "-29"?
In this case, you could use a 2nd transistor as a buffer (common collector) for providing a large input resistance and, thus, decreasing the loading effect.
In your circuit you should increase R35 because you have in parallel the input impedance of the first transistor stage.

Assuming hie=3k and R40=8k you should increase R35 to a value resulting in app. (3k||8k||R35)=1k.
 

Hi,

i couldn't obtain a gain of 29 using this pdk transistor.. so that i used 3 stages.
and do you think 3 stage amplifier cause problems compared to single stage amplifier?

and i will try common collector amplifier and increasing R35.

and FvM i understood that.. but when my amplifier's phase is 180 deg my RC circuit response is very poor because it is well beyond the 3db bandwidth.

if i use more RC stages, i assume i will get the oscillations even before the zero pahse shift of my amplifier and RC network

You think i am right?

thanks
 

kenambo said:
if i use more RC stages, i assume i will get the oscillations even before the zero pahse shift of my amplifier and RC network
Click to expand...

Yes - this coud be a good idea. In case of four identical C-R stages you need only a gain of app- "-18.5" (assuming no loading).
However, don`t forget the loading of the passive part. This changes the frequency as well as the gain value.
My recommendation: Series connection of a common collector (emitter follower) with a gain stage (-19).
 

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