Questions concerning OVM verification Methodology

I've started exploring with OVM sometime ago.

I almost explored most the material available - like the cookbook, Mentor Verification Academy videos and articles, ... etc -.

However, In the examples I've seen, there are things I do have questions I don't know yet:

1- What's the difference between Master Agent and Slave Agent? Why do we need both?

2- Why do we need to make many Master agents - as in the XBUS for example - ?

I'd appreciate if someone can explain this to me in detail.

I suggest you ask this question in the **broken link removed**.
We don't recommend the OVM XBus example as it is based a predecessor methodology to the OVM as well as not being directly convertible to the UVM. For example, default sequences have been removed from the UVM. The OVM examples on the Verification Academy are readily adaptable to the UVM.

To answer your questions, the only difference between a master and slave agent is the ordering of responses and requests between the sequencer and driver. A master initiates requests and waits for responses. A slave waits for a response and then generates a request. The number of masters and slaves in any testbench environment is specific to the device under test, and not necessarily related to the roll of DUT interface the agent is connected to. For example, you may have a USB slave controller connected as a slave to your processor bus, but the testbench may connect to the serial interface of the controller as a master.

Thank you Dace for pointing to me this OVM forum, looks interesting.

I think I do understand your explanation.

However, do you recommend me a specific and good example to study, other than the XBUS ?