questions about crappy capacitor

I have a question while reading the Razavi's analog design book. If you have the book at hand, you can go to the page 425 (in the Chapter 12 "intro. to switched capacitor ckts). Otherwise, I still like to redraw the schematic below:

---------P---X------------------
vin--~----||----[(-) >----vout

---------GND --[(+)
---------------------------------


"~" a CMOS switch
"||" a capacitor
"[(-) " the inverting input of an amplifier
"[(+)" the noninverting input of the amplifier (connected 2 GND)
">" the output of the amplifier
"P" and "X" stand for the voltage at the left and right plate of the capacitor

The book saids that "If vin is zero, turning off the CMOS switch will injects a charge Q1 to the left plate of the capacitor. If there's no capacitance bewteen X (right plate of the capacitor) and GND, VP and VX jumps to infinity. I think that P and X float as swtich turned off and meanwhile a charge Q1 injects to the left plate of the capacitor. Anyone can give me a clue why P and Q will go to infinity? Thx a lot![/img]

I think Razavi is just trying to justify why he assumes a capacitance Cx on the OTA input. If the analysis were attempted with the capacitor truely floating, the math wouldn't work out very well.

Consider a capacitor, completely floating. If we inject a charge packet Q onto one plate, what happens? Well, if the thing really is floating, we produce an excess charge on one plate, and since there is no way to balance this charge on the other plate (Z=infinity to GND), we have a huge potential difference between the plates.

But I am also confused as to why he claims that the voltage goes to infinity. I think the voltage would only go to infinity if you applied a charge packet to a capacitor with capacitance = 0F. Then, by Q=CV: for Q to be finite with C=0, V must be infinite.

What does everybody else think?

lladnar23, thanks for reply. I followed the same thoughts as you. Maybe I will repost it to the section of "Mathematics & Physics" to try my luck.