Questions about CDR design

[easytarget]

Questions on CDR

Hi,
I have to design a CDR and I have a few questions, I would appreciate your help.
1st one (simple): I'm thinking about using an LC VCO, so how can I plot the capacitance vs. vcontrol, you know like the image attached, using hspice or preferably cadence. Thanks.

Edit: oops, I don't know why I can't attach the image, but it's that curve that shows the depletion and then inversion region as the gate voltage increases in an nmos, you know it

 

[khouly]

Re: Questions on CDR

u can plot the capacitance , by using s parameter simulation or ac simaltiuon
just sweep the control voltage
and get the input impedance , the imaginary part is equal 1/(2*pi*f*c)
u know f then u can get C

or in hspice manual there is anonther way to polt Cv curve of search there

khouly

 

[layes2]

Re: Questions on CDR

it is right to use .ac inhspice to simulate the cap
i have done it
you could also use .tran to simulate