hmsheng
Full Member level 4
I have a bus with 32 bits. The 24 MSB bits connect to gnd, and the 8 LSB bit connect to a<7:0>. We can give a wire name as gnd,gnd,...,gnd,a<7:0>. There are totally 24 gnds in the wire name. But this way is very tedious.
In verilog, there is a way like this: 24{gnd},a<7:0> .
Is there a simple way to name the wire in Cadence?
Regards,
hmsheng
In verilog, there is a way like this: 24{gnd},a<7:0> .
Is there a simple way to name the wire in Cadence?
Regards,
hmsheng