Question: the tolerated range of com in pipe adc

[pikky]

Dear all:

In a pipelined ADC,
If the input range is -Vref~+Vref
1.5bit/stage
So every stage need two comparators, with the threshold of -(1/4)Vref and +(1/4)Vref.
My question is : what is the tolerated range of the offset of the comparators?

Thanks.

 

[PaloAlto]

It is what you suspect ;-)

Just below (1/4)Vref

 

[pikky]

Thanks for your reply.

You mean the tolerated offset of the comparator can be as large as ±(1/4)Vref?

Can you supply some meterial to support it?

It is what you suspect ;-)

Just below (1/4)Vref

 

[sahel2303]

this answer is correct. but practically, the comparator offset should be much lower than this to make sure that the ADC will work accurately.
you can find your answer in fundamental data conversion books like the one written by Behzad Razavi: "Principles of Data Conversion System Design" or "CMOS Data Converters for Communications" by gustavsson