question : power mosfet Vds overshoot and ringing at turn off

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cmos_ajay

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Hi,
I have attached 2 application notes that are available on the internet for free.

In application note 1, refer to figure 9 and 10 on page number 13.
-> In the dc-dc step down converter, when the high side (control) mosfet is turned OFF, why do we see a large spike and some oscillations if the gate-drain capacitance [Cgd] is low ??

-> In application note 2, on page 9 it is said Fast turn on / off switching gate plateau near middle of gate drive range. Can someone explain this statement in detail and how it helps to have a gate (Miller) plateau at the middle of the driver o/p voltage ??

Thanks.
 

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  • application note 1.pdf
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  • application note 2.pdf
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