question on sigma delta ADC

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avinash

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we all know that sigma delta ADC consists of two parts.one is modulator and one id decimator.we get single bit streams at modulator otput at oversampling frequency.but how we get the 16bit otput finally.
 

To retrive the 16 bit output you can use the decimator filter. It's for both reduicing the quantization noise and arranging the 1 bit stream in words.
I think you'll find more details about decimation filter in the yellow book by Temes, or on the board (eg. )
Hope it helps
 

i know that we can use decimator filter to obtain bit word.but i wanted to know how the phenomenon is happening
 

Sorry for not being clear enough. I'll try to give more details.
Before doing the actual decimation, you filter the signal. The filter is a combinaison of digital multipliers, adders, and delay (a MAC in a DSP). First the 1-bit stream enter and say is multiplied by 2. You have then a 2-bits word. If after you integrate it (adder+dealy), you need more than 2 bits... and so on. Finally you can have the size you want. Note that if you undersize the words in the filter, you loose resolution. If you oversize, you have useless hardware.
Hope it helps
regards
 

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