ranier
Junior Member level 1
Hi
I am designing the PLL using 0.13um process.( I used the hspice)
(VCO 150Mhz ~ 300MHz, input 11~22MHz ,PM = about 58 )
I found curious thing, when I simulated PLL.
When I used ".tran 0.1ns 10us' , PLL works well.
But When I used " .tran 0.01ns 10us' , Loop filter voltrage show oscillation.
( so output jitter very high)
I don't know difference of two conditions.
and which condition do I believe 0.1ns or 0.01ns ?
Thank you,
JH.
I am designing the PLL using 0.13um process.( I used the hspice)
(VCO 150Mhz ~ 300MHz, input 11~22MHz ,PM = about 58 )
I found curious thing, when I simulated PLL.
When I used ".tran 0.1ns 10us' , PLL works well.
But When I used " .tran 0.01ns 10us' , Loop filter voltrage show oscillation.
( so output jitter very high)
I don't know difference of two conditions.
and which condition do I believe 0.1ns or 0.01ns ?
Thank you,
JH.