daisyzari
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I have a question on making a master I2C. I don't know if it has been asked before, but how can i get the acknowledgement of the slave that happens every ninth pulse of the scl? Should I just assume that it did acknowledge and assert that ack_in on my vhdl code is 0 (which means the slave indeed acknowledged the command) in every action? Also would the slave automatically pull the SDA to low when it acknowledges? If so would it also be okay if I just leave the SDA state to 'Z' (which is '1' due to it being pulled up by a resistor) and allow the slave to pull it low or high depending on the data it would transmit?
Thank you very much. Your help would be very much appreciated
Thank you very much. Your help would be very much appreciated