Question of Power Extraction

[jswan]

Hi, geniuses.

I wanna ask something about power extraction using starXtract, Calibre Xrc or any others.
I'm looking for a simple way to analize power net resistance on chip.

Let's say that I'm designing a long-thin chip, and I want to know the resistance of power net on edges from the power pad.
Simply, I thought that there might be 2 ways.
1. Although I haven't done before, enable power_extract option of starXtrac, and do simulation.
2. Because the way of No. 1 might take too much time, extract power nets only, and do simulation

LPE net seems to be following.

VDD Pad ---- r/c ---- r/c ---- r/c ----Test Point ---- r/c ....

However, I'm not sure what the name of Test Point node is gonna be.

The question is fairly ambiguous, and I don't exactly know what I have to ask.
Moreover my English sucks, but I sincerely want somebody to solve my head-ache.

 

[bgangur]

Hi,

If you are using calibreXRC tool for extraction, you can use GUTPEX extraction for power nets only.
For more details of about gutpex refer the calibreXrc.config file used for extraction and provide the list of power nets in a include file.

Hope this may solve your problem as i believe.

Thanks,
Basu