Question in a mosfet

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waleed101

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Hello everyone ....

why do we take the voltage of mosfet source into cosideration in condition that forming channel ?, i.e NMOS is on when Vgs > Vth , and PMOS is on when Vsg > Vth
but i know that the voltage of gate that accumulates sufficient number of electrons to form the channel is Vth , i.e Vg>Vth , thus why do we take the voltage of source into consideration ?
 

Hi Waleed
I think if you take a look into the crystal analysis of a mosfet and ( looking through the connection of the semiconductors of that ) you'll get the point easily .
Best Wishes
Goldsmith
 

A voltage is always between two points. There's no such thing as an isolated voltage. So when they talk about Vg or Vth it is implied that it is referred to the source, since that is the convention for FETs.
 

ok , but why do we choose specifically the source voltage not the drain voltage ? i want to know the physical meaning.
 

FET's and mosfets are voltage controlled. In a way they could be said to be operated by static charge at the gate.

The volt levels have to be relative, in terms of the gate and another terminal.

Example... You walk on a rug in winter, carrying your laptop computer. You and the laptop might be charged to 10kV. However the laptop still runs because all its innards are charged to 10kV, maintaining the same relative gate-to-source reference.

With FET's, the drain or source are interchangeable. But the reference terminal will be the more negative terminal in an N-channel type. Or the more positive terminal in a P-channel type.

With mosfets you must orient them according to the supply polarity.
 

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With FET's, the drain or source are interchangeable. But the reference terminal will be the more negative terminal in an N-channel type. Or the more positive terminal in a P-channel type.

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That's true in theory but, in practice, most discrete FETs have the body connection tied to the terminal labeled as "source". If you interchange the source and drain polarities with such a device the body diode will start to conduct when the source-drain voltage exceeds the forward diode voltage, independent of the gate-source voltage.

So, in practice, the source terminal is the one with the semiconductor body (substrate) connection. This is shown on most MOSFET symbols as a short connection with an arrow. If the body connection is brought out to a separate terminal, then the source will be whichever other terminal is tied to this body connection.

In ICs the body connections go to the most positive voltage for the P-FET devices and the most negative voltage for the N-FET devices. For those transistors the source and drain are indeed interchangeable and indistinguishable from each other.
 
so Vgs is the voltage between the gate and the bulk as the bulk is connected to the source ?
 

That's true in theory but, in practice, most discrete FETs have the body connection tied to the terminal labeled as "source"...

I forgot to make clear that it was JFETs (not mosfets), which I understood to have interchangeable source and drain. Such as the popular 2N3819.

I'm not sure this applies to all JFETs. So it's wise to follow the way the pins are labelled.
 

but if we interchange the vlotage applied between source and drain i.e interchanging drain and source , so Vgs is the voltage between the gate and old source connected to bulk or the voltage between the gate and the new source ?
 

Firstly usual MOSFET characteristic descriptions in textbook are restricted to one quadrant. In so far, inchanging of source and drain is out of view.
Secondly, it only applies to symmetrical MOSFETs, not typical power MOSFET. Substrate connection is just one aspect of it's asymmetry.

Finally, I don't see it related to your original question.
 

but if we interchange the vlotage applied between source and drain i.e interchanging drain and source , so Vgs is the voltage between the gate and old source connected to bulk or the voltage between the gate and the new source ?
With the bulk tied to a fixed voltage then which acts as the source and which acts as the drain is determined solely by the relative terminal voltages. For an N-channel the source is the most negative terminal and for a P-channel the source is the most positive terminal.
 

inchanging of source and drain is out of view.


you know that NMOS passes strong logic 0 and weak logic 1 , if we have NMOS with drain connected to VDD and source connected to capacitor and then we apply VDD on the gate making mosfet ON ,so the voltage of the capacitor which is the same as source is VDD-Vth and then the mosfet is OFF(Vgs=Vth), then if we apply zero voltage on the terminal which was connected to VDD(old drain) ,the polarity of drain and source will interchange and the mosfet will conduct again (Vgs=VDD)and so the voltage of capacitor become zero

if this is right ,so Vgs is not the voltage between the gate and the bulk which is connected to source ,and if this is wrong ,so what is the physical meaning of Vgs ?
 


ok , i understand that ,but when we use mosfet in gates ,changing the voltage between source and drain is valid,so Vgs became unclear to me , is Vgs always the voltage between the gate and the bulk or the voltage berween the gate and the source (more negative terminal) even it was not connected to the bulk ?

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It is the voltage between gate and source.
That is why it is called "Vgs".
V = Voltage
g = gate
s = source

yes i know that,but what is the role of the voltage of source in accumulating electrons or holes , i know that the vertical electric field is responsible for accumulating electrons or holes , so why do we concern with the source voltage?
 

It is the voltage between gate and source.
That is why it is called "Vgs".
In addition (this has been already mentioned, too), voltage differences are ruling the behaviour of electronical devices. The voltage difference between gate and "the channel" commands MOSFET current flow. The channel is pinched-off the most near the source contact, and thus Vgs is the quantity primarly commanding Id, presuming sufficient Vds.

Vgb is also affecting the current flow. You can imagine that the channel is pinched-off from two sides. The usual way to consider bulk effect in MOSFET equations is to make the threshold voltage Vbs dependent.
 

The channel is pinched-off the most near the source contact, and thus Vgs is the quantity primarly commanding Id, presuming sufficient Vds.

Hi
Assuming that you are talking about an NMOS, this not true. For an NMOS, channel is widest at the source and goes on decreasing towards the drain. The reason for this is that there is an increasing voltage gradient from sourec to drain, so the voltage between gate and channel goes on decreasing as one moves from source to drain. So the pinch-off occurs on the drain side.
 
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