question : Floating nodes after transient sim. in Cadence ?

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cmos_ajay

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I have a transient simulation running in Cadence. I am powering 'down' my analog circuit in the middle of this simulation.
How do I check for floating nodes after the circuit has been powered down ??

On the schematic I have already done Options -> Check rules setup -> Floating nets = Warning

I will appreciate the reply.
 

The Floating nets Electrical Rules Check (ERC) has nothing in common with high impedance nets during power down state. The connectivity in this state is still the same.
 

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