Question about the value of opamp's UGB

[avinash]

from gregorian i read that for SC circuits the UGB(w0) of opamp should be greater than 1/Tsh.
w0 > 15/Tsh
Tsh is the charging discharging time of load.
Tsh=1/(2f),where f is clock frequency.
now my question is if my clock is 1Mhz,w0 comes to be 30Mhz.is it not sounding strange.
please help

 

[Btrend]

Re: question on UGB

from gregorian i read that for SC circuits the UGB(w0) of opamp should be greater than 1/Tsh.
w0 > 15/Tsh
Tsh is the charging discharging time of load.
Tsh=1/(2f),where f is clock frequency.
now my question is if my clock is 1Mhz,w0 comes to be 30Mhz.is it not sounding strange.
please help

it depends on ur spec. of accuracy ( or resolution).
as u may know, the step response of a single pole (ωp) SC circuit may be represented as : Vout(t)=Vi(1-exp(-t/α)), where α=1/[(1+Aβ)ωp)] is the time constant of the closed loop system. So, the difference voltage (Δ) between Vout(t1) and Vout(0) is Δ=Vi*exp(-t1/α)).
==> t1=-α×ln(Δ/Vi) = -ln(Δ/Vi)/[(1+Aβ)ωp)] ≈ ln(Vi/Δ)/(Aβωp)=ln(Vi/Δ)/(βω0)
that is the difference will decrease as t1 increase
==> t1 >= 1/(2f) to achieve the desired difference voltage.
==> 1/(2f) >= ln(Vi/Δ)/(βω0)
==> ω0 >= 2f*ln(Vi/Δ)/β
==> 2*pi*f0 >= 2f*ln(Vi/Δ)/β ==> f0 >=f*ln(Vi/Δ)/(β*pi)

if ur spec. is Vi/Δ >= 1000, β=1 ==> ω0 >= 13.8f ==> f0 >=4.39f
Vi/Δ >= 1000, β=1/2 ==> ω0 >= 27.6f ==> f0 >=8.78f
Vi/Δ >= 10000, β=1 ==> ω0 >= 18.4f ==> f0 >=5.86f
so if f=1MHz, in order to achieve accuracy of 0.1% (i.e. Vi/Δ >= 1000) ,u need to design ur f0 >=4.39MHz for β=1.
the above derivation show that u don't need such high BW of ur UGB for 1MHz sampling clock, but always keep in mind ,there exist variation of process , so u should always choose large value of f0.

hopes this help u.

 

[avinash]

Re: question on UGB

thanks Btrend.
one more query.as you said f0 depends how much accuracy is needed in Δ/Vi.
but how to decide that how much accuracy is needed.
one more question.i am having a bandgap voltage that is to be passed through unity gain opamp.what should be the UGB of that opamp.or while designing that opamp what specs should i keep in mind.the opamp will drive a capacitor (35pF) followed by a switch.the switch operates at 200kHz. bandgap voltage is -1.245V.supply is ±2.5V.hope you got my question.
thanks in advance.

 

[rajath]

Re: question on UGB

I think you should add a large capacitance at the output of the reference buffer, if you need to reduce the spike at the output when the switch turns on. Else, it will be difficult for the limited bandwidth amplifier to adjust the output voltage for sudden changes. You should also look at the slew rate specification, and make sure that the amp is able to supply enough current to the capacitor and charge it within the required time.

 

[Btrend]

Re: question on UGB

thanks Btrend.
one more query.as you said f0 depends how much accuracy is needed in Δ/Vi.
but how to decide that how much accuracy is needed.
one more question.i am having a bandgap voltage that is to be passed through unity gain opamp.what should be the UGB of that opamp.or while designing that opamp what specs should i keep in mind.the opamp will drive a capacitor (35pF) followed by a switch.the switch operates at 200kHz. bandgap voltage is -1.245V.supply is ±2.5V.hope you got my question.
thanks in advance.

1. In designing Sample & Hold (S/H) of ADC, the S/H dominate how much accuracy u can achieve in ur final resolution. said if u want to design a 10bit ADC
u should make sure u got the right enoguh " resolution" of voltage at every end of sample pulse. so if ur signal Vi=1V, the Vi/Δ should be larger than 2^10, that is ur Δ < 1/1024 ≈1mV.
2. it depends on how much current surged from ur switch which should connect to some load. the current contains AC and DC term. I think ur 35pF cap will work as a part of AC term supplier (but this is again, depends on how much current u draw , cause cap can only supply current as i=C*ΔV/Δt ). as far as the other part of AC term and DC term, u should supply it through the opamp. the UGB is then depended on ur load transient response. this part of design is just a Linear regulator. u can find some good document on this EDAboard.