Question about the sampling cap size of pipelined ADC.

[didibabawu]

cap size in pipelined adc

When we design the pipelined ADC, We must decide the cap size of the sample and hold circuit. In order to have enough margin, we must make the cap bigger than they just satisfied. Then I want to know how much margin we shoulde use in our design. For example, for a 10bit ADC, when we decide the size of the cap, we should use more than 10bit maybe 11bit or 12bit to calculate the size, then how much the margin I use is appropriate.

3X!

 

[naalald]

Hi,
It depends on your design and is your skill not to spend too much, while satisfying the circuit requirements. After all it's not something definite. It can be designed iteratively.