Question about simulationg TSMC 0.18um analog circuits in Hspice

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yen

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Dear all,
I simulate my analog circuit in hspice. In general, why simulate
TT vdd=1.8V temperature=25
TT vdd=1.8V temperature=50
FF vdd=2V temperature=0
SS vdd=1.6V temperature=120?
I use tsmc 0.18um.
Thanks.
 

Re: simulation question

yen said:
Dear all,
I simulate my analog circuit in hspice. In general, why simulate
TT vdd=1.8V temperature=25
TT vdd=1.8V temperature=50
FF vdd=2V temperature=0
SS vdd=1.6V temperature=120?
I use tsmc 0.18um.
Thanks.
Click to expand...
The first two cases are just to make sure the design is "centered" with typical process, voltage, and temperatures.
The third case is the fast corner. Fast transistors (generally higher gm, lower Vth, and lower capacitance) will give lower propagation delays, as will higher voltage and lower temperature. The fourth case is the opposite of the third.
I think it is also important to check FS and SF at the voltage and temperature extremes, because this can cause duty cycle distortion (unequal prop delays on rising vs falling edges).
 

simulation question

As there will be variation in the fabrication, these few corners(TT,FF,SS), which is define by the fab can help you to ensure that your circuit will work according to specification even there is fabrication process shift. For temperature change, this is to ensure your design can work in different region of the world, where temperture varies. Monte Carlo is another method that can be used to simulate corner and fet matching.
 

simulation question

because the process has some offset , so you must simulation different corner to simulate the performance of your design.
 

simulation question

To make sure that the design works fine even iif the fab shifts within limits specified in the corner files.
 

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