Question about sigma delta ADC!!!!!!!!!!!!!

Status
Not open for further replies.
B

blueseatears

Newbie level 4
Joined
Mar 26, 2006
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,304
Hi, all
We've designed a 16bit Sigma delta ADC.
But the performance of the chip is not stable:
The SNR varies between 60dB and 90dB.

Do you encounter such matter?

plz help me!!!!!!
 

is it discrete time SD?
 

hey guys can any one tell me why a SC-CMFB becomes unstable and how to overcome this problem. I have designed a folded cascode OTA with SC_CMFB and its output in transient response is oscillation. help me please it's urgent. I am designing it for a sigma delta ADC Discrete Time.
Thanks in advance.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…