For a flash AD (pipeline AD), I need a reference voltage 1.25V and 1.75V which
is connected to sample/Hold circuit (comparator).
Because of the clock feedthrough and charge injection of the sampling switch, the
reference voltage is changed. So I add a buffer connected opamp to isolate it.
The buffer input is i.25 and 1.75(volt).
I wandered that increase the opamp bandwidth and slew rate would help the
settling behavior of the buffered output voltage.
Could any body help me plz?