Question about PENABLE signal in APB bridge

Status
Not open for further replies.
C

chiguoquan

Junior Member level 3
Joined
Mar 30, 2006
Messages
26
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,410
The AMBA specification said that the apb bridge generates one PSELx signal for each slave,and all the slaves share the same PENABLE signal.
But the apb monitor in QuesteSim has the folowing assertion:
APB_05: The PENABLE signal should not be high when PSELx is low.
How can this assertion being satisfied while all the salves are driven by the same PENABLE signal?
 

why apb penable

it doesn't metter the PENABLE will high or not if the PSEL is low. the PENABLE is just a globle enable signal for APB. if u are design a slave. the PSEL should decode from an address decoder to select which APB slave.

so if the APB slave device is not selected than just ignore the PENABLE, that's it..

example:
assign select = PWRITE? (PSEL & PENABLE) : (PSEL | PENABLE);
 

apb penable without psel

I understand what you said. I am just confused when I encounter this message:

OVL_ERROR : ASSERT_NEVER : QVL_APB_VIOLATION : The PENABLE signal should not be high when PSELx is low : Test expression is not FALSE : severity 1 : time 340 ns : clk80mdomain_tb.u6.u4.mon0.APB_05.ovl_error_t

The APB Monitor's documentation said that the APB monitor should be placed inside the slave or inside the APB bridge. Maybe the documentation make a mistake,and I should place the monitor inside the bridge,not inside the slave.
Thank you for your reply.


 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…