Question about MOS resistor as RC filter

[kevinlin]

Hello everyone,
i have simulate a simple rc filter which NMOS play as a resistor.The NMOS is biased at threshold and triode region,so it can have large resistance.

In AC simulation,i found a predict result which a low frequency pole appeared,but followed by a RHP zero is confused.Where it came from?

In trans simulation,i found dc point was not equal 400mv but slowly rise to 370mv and never catch up to 400mv,it meaned that there was sinked current in mosfet?

Thanks for giving me explaination.

 

[LvW]

Hello everyone,
i have simulate a simple rc filter which NMOS play as a resistor.The NMOS is biased at threshold and triode region,so it can have large resistance.
...............

Bias condition are established via gate-source voltage. However, your source node is floating. More than that, no dc current can flow through the drain source path.
Be careful, ac simulations not always tell you the truth!

 

[kevinlin]

Yes,it is.In my option , it's a low pass filter.
In my simulation , i found that it not a linear resistor .So charges on and off cap are different.

 

[FvM]

In my simulation , i found that it not a linear resistor.

Not surprizing, actually.
Regarding the transmission function zero, you can simply assume a (really small) Cds of a few fF... Also not surprizing for a real device.

 

[rfsystem]

Using a MOS as resistor in triode but in subthreshold region is difficult because the change in DC voltages change also the effective resistance in an exponential way. The circuit solution is that the gate drive is dependend on the resistor terminal voltage. But the substrate effect make the implementation for NMOS difficult. It is easier with isolated NMOS or PMOS where the substrate could be connected to filter input. Then gate is driven by an amp which shift the DC input voltage of the filter by the MOS resistor gate drive voltage.

Regarding Cds which act as source of the zero I have doubts that the model is correct. If you ground the substrate there is only a stray cap from drain to source. The gate works to as a shield. At higher frequencies a distributed MOS model which divide a typical long channel into shorter channel segments is more accurate. Also here a Cds is typical not found. The substrate have a distributed resistance and that I think gives some coupling direct from drain to source w/o channel impact.

So take a close look at your model.