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Question about degeneration in GM cell design

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safwatonline

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degeneration resistance

hello,
i have a queation , i saw in a certain gm cell design using a degeneration resistance to linearize the gm , but i noted that the load of the gm cell (diode connected) is connected to another branch from the current mirror and equal to the tail current.
can anyone explain why? does it has to do with degeneration or it is here for another reason?

thnx and regards.
a.safwat
 

degeneration

I guess that before anyone can answer your Q you have to post your schematic.
 

Re: degeneration

If I understand your question, then the extra current source placed in parallel with the diode connected load is used to increase the gain. This is done by decreasing the current through the diode connected load, hence decreasing its gm and increasing its equivalent resistance "1/gm". I am not sure if that's what you meant...
 

Re: degeneration

elbadry said:
If I understand your question, then the extra current source placed in parallel with the diode connected load is used to increase the gain. This is done by decreasing the current through the diode connected load, hence decreasing its gm and increasing its equivalent resistance "1/gm". I am not sure if that's what you meant...
AA,
i dont get how the current is decreased , if u see the highlighted branch it supply the same current as the the tail current source (PMOS) , and in this way it increase the current not decrease it , so gm of the diode connected is increased.
why increasing gm and also y not just increase the current of the tail MOS , to increase the diff. pair current as well (and hence the gm of the diff. pair).
note that this is a gm cell (i.e. the gain as voltage shouldnt matter to me).

thnx for the help.
a.safwat[/list]
 

Re: degeneration

My first guess is that the extra current is injected into the diode connected devices in order to improve the saturation response. If the amplifier is sent into saturation, one of the diode connected devices will see zero current, and it's gate voltage will collapse. Upon return, the response will be slew-rate limited by the current driving into the gate node and the capacitance of that node.

With the injected current present, there is a defined level that the gate voltage will settle to in an overdrive condition, and it is much closer to the normal operating condition. This will speed the return from overdrive.

Is the element used in a circuit where overdrive is likely, or where a delay on the return from an overdrive condition might cause problems, such as instability?
 

    safwatonline

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degeneration

the extra current source is used to provide the diode a least current
 

Re: degeneration

montage3000 said:
the extra current source is used to provide the diode a least current
hello,
i cannot understand what do u mean by a least current ,
thnx very much JPR do u recommend any thing for further reading on this point??
regards,m
a.safwat
 

Re: degeneration

I do not have any literature for this. What I would recommend is to evaluate the circuit with and without the extra current into the diode connected devices to see what effect they have.

To see the impact of the slew rate limitation, you could put a large input differential voltage (greater than Ibias*R) such that all of the bias current runs thru one input device and none thru the other input device, then return the circuit to a small (or zero) differential voltage and compare the transient with and without the extra current into the diode devices.

Other things you might look at would be the transconductance (which should be nearly uneffected), the voltage gain (which should be reduced by the extra current) and the bandwith (should be greater bandwith with the extra currents). From the differences, and the application, you should be able to determine what the trade-offs are, and determine which one(s) is/are important to the application.
 

    safwatonline

    Points: 2
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