question about current sink

[kenddo]

hi all,
i'm trying to design a high precision current mirror /sink ,the current sank by each channel is up to 150mA and the error is less than 5% while the vds is only 1.0~2.0v.
i don't know if it 's possible to meet such requirement in cmos ? woule u give me some adversise?

 

[evilguy]

what process will you use. your current is quite high.

 

[ycj]

Meet such requirement in CMOS? Of course you can, and you can do better.

 

[khouly]

for good matching and low voltage u need to use wide swing current mirror which is like cascode current mirror

khouly

 

[DZC]

cascode current mirror provide high precision bu at the spend of swing.
For good maching,unit cell and careful layout should also be consided

 

[kenddo]

thx all
my difficulty is that i have to set w/l ratio >10,000! if i use cascode current mirror the area is quit large

hi evilguy , the process is 0.5u nwell

 

[evilguy]

thx all
my difficulty is that i have to set w/l ratio >10,000! if i use cascode current mirror the area is quit large

hi evilguy , the process is 0.5u nwell

10,000 in lambda or micron? can you post your circuit. probably it is much easier for us to help you.

 

[szekit]

for such a high current, i think not much you can play with other than increasing the W/L ratio. for the 5% variation, if you are talking about one current sink, u can always trim it to whatever you desire. but if you are talking about matching a bunch of these guys, you need to bias vgs >> vth for better matching which means smaller devices and large headroom.

 

[kenddo]

for such a high current, i think not much you can play with other than increasing the W/L ratio. for the 5% variation, if you are talking about one current sink, u can always trim it to whatever you desire. but if you are talking about matching a bunch of these guys, you need to bias vgs >> vth for better matching which means smaller devices and large headroom.

yes, i need to have 24 channel matched, and i can not bias vgs >> vth for the output voltage of the current sink is quite small.

 

[shaikhsarfraz]

for such a good precision go for wide swing mirrors, or regulated current mirrors.

 

[ycj]

for such a high current, i think not much you can play with other than increasing the W/L ratio. for the 5% variation, if you are talking about one current sink, u can always trim it to whatever you desire. but if you are talking about matching a bunch of these guys, you need to bias vgs >> vth for better matching which means smaller devices and large headroom.

yes, i need to have 24 channel matched, and i can not bias vgs >> vth for the output voltage of the current sink is quite small.

Now you have 24 channel, each pass 150mA current with vds at least 1.0v . In other words, your chip will consume power of 24*150mA*1.0V=3.6W! Maybe you have to worry about the package first if your chip will go mass production.