It is not unusual for a loop to not lock up during development. You must figure out what is going on. It could be a number of things, that you have to test and get some clues from:
1) is the chip programmed properly. Sometimes the chips program in obscure ways, and you end up an LSB off from where you want to be. See if there is any access to the divide by R and N chains, and put in know frequencies and see if the correct (exact) frequency comes out of the divider.
2) PLL's need negative feedback to work. Sometimes you end up with positive feedback by accident and it won't lock up. Try switching PD and PU.
3) Often the loop filter is wrong for the particular VCO you are using, and the loop will not be stable. I assume you know that you do not just hook up an op amp straight from the PD to the "+" amplifer terminal, and do not hook up the PU to the "-" terminal! You need resistors and capacitors between the two integrated circuits to form an integrating lowpass filter! Assuming you know something about loop filters, lower the loop bandwidth to something very small, like 50 Hz, and see if it locks up. If it sits there oscillating at 50 Hz instead of locking, move the filter's zero around to try to get it stable. Try all you can to get it locked up, and if successful then move your way back to the loop bandwidth you desire.
Let us know how you make out with these tests.