[question]a question about a pll circuit

[nirvanafl]

I design a pll circuit, using pe3336. But this circuit is not loced. I check pin of pe3336, export of phrase detector pin-PD and PU are pulse squence, passing loop filter, check that filter export is a pulse squence, not a fixed electric level. So pll is not locked. I join PD to amplifier's "-", join PU to ampliter's "+", this method is correct, isn't it?

 

[biff44]

It is not unusual for a loop to not lock up during development. You must figure out what is going on. It could be a number of things, that you have to test and get some clues from:

1) is the chip programmed properly. Sometimes the chips program in obscure ways, and you end up an LSB off from where you want to be. See if there is any access to the divide by R and N chains, and put in know frequencies and see if the correct (exact) frequency comes out of the divider.

2) PLL's need negative feedback to work. Sometimes you end up with positive feedback by accident and it won't lock up. Try switching PD and PU.

3) Often the loop filter is wrong for the particular VCO you are using, and the loop will not be stable. I assume you know that you do not just hook up an op amp straight from the PD to the "+" amplifer terminal, and do not hook up the PU to the "-" terminal! You need resistors and capacitors between the two integrated circuits to form an integrating lowpass filter! Assuming you know something about loop filters, lower the loop bandwidth to something very small, like 50 Hz, and see if it locks up. If it sits there oscillating at 50 Hz instead of locking, move the filter's zero around to try to get it stable. Try all you can to get it locked up, and if successful then move your way back to the loop bandwidth you desire.

Let us know how you make out with these tests.

 

[nirvanafl]

1) and 2) step is not problem.
I'm suspicious of that phrase detector export have a little problem, resistors and capacitors value are caculated about loop filter bandwidth of 20khz. At the same time, I use q3236, pll circuit is lock when circuit is not changed except for power supply part. Just I wrote pd terminal to amplifer terminal incorrectly, should be pd_d terminal to the "+" amplifer terminal, pd_u terminal to the "-" amplifer terminal.

 

[biff44]

Are you saying that you have an existing circuit that works fine with a Qualcom Q3236 in it, but does not work with a PE3336 in it?

 

[nirvanafl]

yes, circuit' power supply part is different, and loop filter' resistance and capcitance are dirrerent.

 

[biff44]

Well, I don't know how to help. It could be one of a hundred different things. There is a bit of a language barrier too. If you are willing to publish the schematic, VCO tuning curve, and info on how you are programming the chip I will see if I can see anything.