tompham
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Hi all
Im confusing with LDO quescent current of LDO. Some one define it is current of power transistor w/o load. Some define it is total current (Ivdd) of LDO + bandgap + current bias. I see some paper tells quescent current around 7uA, and LDO can handle up to 100mA loading. From my understanding if LDO can handle 100mA , need huge pmos transistor and the buffer to drive this pmos need large current to deal with slew rate. So 7uA total current not make sense to me. I hope anyone in this forum can share idea about this. Thanks a lot
Im confusing with LDO quescent current of LDO. Some one define it is current of power transistor w/o load. Some define it is total current (Ivdd) of LDO + bandgap + current bias. I see some paper tells quescent current around 7uA, and LDO can handle up to 100mA loading. From my understanding if LDO can handle 100mA , need huge pmos transistor and the buffer to drive this pmos need large current to deal with slew rate. So 7uA total current not make sense to me. I hope anyone in this forum can share idea about this. Thanks a lot