query about capacitor and PUT

I've been working through 'Make: Electronics', and I'm having some trouble understanding how experiment 11 works. I'm completely new at all this, so I hope this makes sense to you. The circuit is like this:

6V dc: from positive goes to a 470K resistor, then a 2.2microfarad capacitor, then back to negative.
Between the resistor and the capacitor, a branch goes to the anode of a PUT, which has its gate set at about 4V (by some other stuff which isn't important).
From the cathode, it connects to an LED, and then back to negative.

I hope that's simple enough that I don't need to draw it. The idea is to make the LED flash intermittently (somewhere around once a second, give or take). It works OK, and I've had fun substituting different values of everything to see how it affects the frequency of flashed. Fine.

My question is: why is the voltage from the battery insufficient to overcome the threshold of the gate?

I mean, the idea here is that the gate won't open until the capacitor has charged up to just over the threshold set at the PUT gate, i.e. 4V. Then it discharges, passes through the PUT and lights the LED. But why isn't the PUT anode getting full 6V from the battery anyway? The 470K resistor shouldn't have any effect on the voltage at the anode, because both the PUT and the capacitor are infinitely resistant (until the gate opens).

The author sometimes says things like 'the capacitor sucks current…' Does he actually mean this? Am I to imagine that voltage from the battery is diverted to the capacitor until the capacitor is sufficiently charged?

When the capacitor is discharged, it causes the node above it to be at 0V.

It begins charging.

No current goes into the PUT. (This is the sense in which the capacitor sucks current.)

The node volt level rises gradually. Eventually it is greater than the bias level on the PUT gate. The PUT activates.

The capacitor 'dumps' (discharges) through the PUT. (Its charge does not drop to zero, but it drops just below the 'On' threshold of the PUT.)

The PUT shuts off. Then the cycle begins again.

Am I to imagine that voltage from the battery is diverted to the capacitor until the capacitor is sufficiently charged?

Click to expand...

Yes. The resistor-capacitor cell create a delay effect. The node between them shows a rising ramp volt level (even though the entire supply V is applied to the top end of the resistor).

Thank you very much. Indeed I have noticed variations in voltage-drop over the resistor as the capacitor charges, so what you say fits. Two further questions:

1) Does the battery then contribute nothing to the current that flows through the gate? From observation, as the capacitor voltage goes up, the voltage drop across the resistor goes down, meaning that more voltage is getting through from the battery. Do I deduce that both capacitor and battery are delivering the same voltage to the node, keeping pace with each other? So that when the gate opens, both capacitor and battery send current through the PUT?

2) If the gate is set at 4V, and the capacitor reaches 4V or just over, and opens it, why doesn't it shut immediately the capacitor has dropped to 3.9 V? And then open again immediately because regaining that fraction of a volt takes a fraction of a second? Instead I notice that the charge on the capacitor drops much lower, way below the threshold, and then of course takes time to recharge. Is the gate slow to close? Is it in fact slow to open, too? There are some combinations of values I tried where the LED lit up for a measurable period of time (a quarter second??), implying that there is some amount of delay inherent in the PUT itself.

socratidion said:

Thank you very much. Indeed I have noticed variations in voltage-drop over the resistor as the capacitor charges, so what you say fits. Two further questions:

1) Does the battery then contribute nothing to the current that flows through the gate?

Click to expand...

From the simulation, the scope traces show that the capacitor contributes everything, as a 490 mA spike.



The charging resistor never carries more than a few uA.

The schematic comes from the 'PUT oscillator circuit' at:

https://www.4qdtec.com/putpr.html

It gives an explanation as to how it operates.

2) If the gate is set at 4V, and the capacitor reaches 4V or just over, and opens it, why doesn't it shut immediately the capacitor has dropped to 3.9 V? And then open again immediately because regaining that fraction of a volt takes a fraction of a second? Instead I notice that the charge on the capacitor drops much lower, way below the threshold, and then of course takes time to recharge. Is the gate slow to close? Is it in fact slow to open, too? There are some combinations of values I tried where the LED lit up for a measurable period of time (a quarter second??), implying that there is some amount of delay inherent in the PUT itself.

Click to expand...

The transistors provide bias to each other, so that once they are triggered on, they both remain on until there is no more current flowing.

The trigger level is set by the potentiometer (at right). When the capacitor charge rises above this, the PNP transistor conducts.

As for the capacitor, it discharges as fast as it is permitted by the resistance it sees. (I added a 4 ohm resistor to prevent the capacitor charge from going into negative polarity due to a shortcoming in the simulation.)

The transistors discharge it down to zero.

Thank you so much: really helpful.