PXI Express Tigger problem

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hello, in PXI-1, it says that PXI_TRIG[0:7] shall be terminated at both ends of PXI_TRIG[0:7] on the

backplane, but in PXI-5(PXI Express Hardware Specification), it only says that PXI_TRIG[0:7] shall be

terminated at both ends of PXI_TRIG[0:7], not state on the backplane or peripheral, so when I design a

PXI Express peripheral, should I teminate the PXI_TRIG[0:7] with diode and Res, Cap?thanks.
 

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