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Pull-up and pull-down technology in microcontrollers

marco73it

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Hello everyone,

I am making measurements for the characterization of pull-up and pull-down resistances in microcontrollers GPIO interface. I am currently working on a STM32 microcontroller, and in particular the STM32F103C8T6. A ST Microelectronics employee on the ST Microelectronics forum told me that pull-up and pull-down resistances in the STM32 microcontrollers GPIO interface are not designed by “real” resistors, but using MOSFETs with high channel resistance. Of course, he can not provide details about how the microcontroller is designed.

I want to know if anyone can provide details (or a source where I can find it) about the circuital schematic of the implementation of pull-up and pull-down resistances in microcontrollers GPIO interface.

Thanks.

Marco
 
Hi,

pull ups and pull downs usually can be switched ON and OFF.

So when thinking in PCB level design one maybe would use a MOSFET (as the switch) and a resistor (for current limiting).
But on IC level if you did the same you would need a bigger area for a low ohmic MOSFET (the more low ohmic the bigger) and additionally one would need chip area for the resistor (what is your idea how to generate a "true" resistor on a semiconductor?).
But the bigger the chip area the higher the price for the IC.

So the straight forward solution is to use a weak (small) MOSFET ... that´s it. Reduced area = reduced price.

Klaus
 
Pullups are designer's choice and I will always favor a resistor for pin-exposed, no thin oxide to protect "extra specially".

Long channel MOS could be used but much higher variability PVT and must be within ESD protection.

There is always room in the I/O ring for one more resistor but digital-only CMOS designers often don't think about diodes and resistors and such.
 
It's not clear to me what's your exact question? Datasheets have detailed info, e.g. STM32F103:
Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimum (~10% order).
--- Updated ---

Did ST employee state datasheet is wrong, actually no real resistor present?
 
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