tenso
Advanced Member level 4
I wasn't sure about my answer for the above question and doing some LTSpice simulation didn't help because of inadequate model files.
As the question says, we have to find the voltage at the source and drain of the NMOS, PMOS respectively when the value of VIN changes. I was hoping someone here could correct me if I am wrong here.
For the NMOS, the highest drain can go is Vin - VTh because at VGS = VTH the device turns off.
For NMOS,
Vin | Vo1 |
5 | 5-VTH |
3 | 3-VTH |
2.5 | 2.5-VTH |
0 | 0 |
For PMOS
Vin | Vo2 |
5 | 0 |
3 | 5 |
2.5 | 5 |
0 | 5 |
I am not sure of my answers. For the PMOS, when it is not strongly turned on by Vin = 3 and Vin = 2.5, I am not sure what Vo2 is supposed to be or how it can go