Pspice simulation using IBIS model

[navbp]

Hello,

I need to simulate a circuit which uses 74HCT1G08 AND gate. I got an ibis model for this AND gate.
I tried to translate it to spice model using IBIS translator in Orcad 16.6. Steps followed as shown below.

- IBIS translator in model editor.
- selected all.
- selected typical user specifications.
- regenerated dml files.
- exported to capture library
.lib and .olb files were generated.

But when I tried to add the component from library, I get a component which has different set of pins.
Instead of A,B (inputs) and Y (output) of AND gate, the component pins are named as Input, Output and Enable.
And these pins are mentioned as bidirectional type.

How can I relate these pins to the AND gate pins? How to use the IBIS model for simulation purpose?
Have I missed something to translate the IBIS model to spice model?

IBIS model is attached. Appreciate your help!
View attachment ahct1g08.zip

Thanks!
Regards,
Navbp

 

[FvM]

You are apparently misunderstanding IBIS models. They are only representing certain device properties, static and dynamic pin characteristics, but not logic function. Whatever the Orcad IBIS translator specifically does, it won't give you a functional AND gate model.

The component with input, output and enable pins is probably a general model for pin parameters, including possible three-state function. In case of basic CMOS in- and output pins, enable should be don't care. I guess there's some documentation for the translator available, but I'm not sure if the translated IBIS model is of much help for you. In any case you need to supplement the AND logic function to get a full model.

The advantage of IBIS models is to provide empirically measured I/V characteristics of pin behavior. If your simulation problem depends on this information, translation of IBIS data makes sense. For other problems, it hardly does.

 

[navbp]

Thanks FvM for the quick reply. :smile:
So, IBIS models describes only the I/V characteristics of each pin. That explains why the hct1g08.lib file has a single pin component.
I have followed the translation instructions available on Orcad help and few other sources. Result is the same.

If its only functional simulation, any 2 input AND gate spice model would work. But for my simulation, I/V characteristics of pin behavior, pin parasitics are also necessary.

I know now the difference between the spice model and the IBIS model, Thanks to you! but still not clear on how to use IBIS model.
If I connect a single pin component which describes 'input pin' in the circuit, will it be considered as the input pin of hct1g08 AND gate?
Similarly how an 'output pin' characteristics can be simulated? ie., how can I distinguish the VI characteristics when the output is high / low?

Regards,
Navbp

 

[FvM]

I don't know how the Orcad pin models look like. I would expect buffers to be connected in series with the in- and outputs of a behavioral AND gate. If you look into the IBIS model, you see that it has separate pulldown and pullup characteristics as well as time domain edge descriptions for the output.

The input model describes only the clamping diode. If you don't apply negative voltage to the input, you can omit it.