Pseudo-random binary noise generator

[steven_arnold_85]

pseudo binary random generator

Hello,

I was wondering how I would go about building a pseudo-random binary noise generator. I was wanting to build it totally out of basic analog components. If possible I don't want to use a programmable chip. Could any one help me with a circuit design or give a link to a site with one?


Thankyou

 

[mudrik]

adc random generator

I think you need some shift registers (flip flop or so)
and clocking components.
At the output of the generator, you need some buffer memory

regards

 

[IanP]

pseudo random noise generator

Try the attached circuit ..
If you need to change bit streem to bytes you will need:

The signal should not be sampled more often than every few hundred
nanoseconds, to avoid correlation between consecutive bits. There
will be a noticeable bias (1s more likely than 0s, or vice versa).
The bias can be greatly reduced by XORing a few raw bits together.
Probably a better idea is to take a large number of bits and use a
good hash function to reduce them to a smaller number.

Regards,
IanP

 

[steven_arnold_85]

pseudo random noise signal generator

Thanks for the help guys but I need a pseudo random generator. It is random but it always follows the same sequence if it is restarted. Any other ideas?

Thanks

 

[sunking]

binary noise generator

you can refer to the delta sigma adc where there is a DEM method which can meet your requirement

 

[echo47]

random binary generator

I can't imagine how to build a repeatable pseudo-random generator with analog parts!

I suggest an LFSR. It contains a simple shift register, a few XOR or XNOR gates, and a clock. You choose the clock rate and register length to suit your application.

Here's an application note that shows how to implement it in an FPGA that has lots of cheap 16-bit shift registers, but it's also easy to build with ordinary logic chips.
https://www.xilinx.com/bvdocs/appnotes/xapp210.pdf

 

[eng_Semi]

random binary generation

PN generators may be implemented using shift registers, or mainly D-FFs and the binary sequence pattern generated depends on the connections between these D-FFs, and the pattern length depend on the number of stages of the D-FFs.

For more information u can read from Digital Communications for Simon Haykin

 

[master_slave]

random generator circuit binary

I think I've read that pseudo random generator before, from John Peatman's Digital Hardware DEsign (c) 1980. I am not sure if its still available, but the PRBS consists mainly of a shift register and XOR gate.

 

[fredflinstone]

how to build pseudo-random generator

Try this site, it may help

**broken link removed**

rgds
fred

 

[sinatra]

pn 11 psuedo-random

You can find almost everything about pseudorandom noise generators and also some good design example in the following book:
The Art of Electronics - Horowitz

There is a chapter dedicated to this subject that is the best description I saw after many years searching.

And you can find this book in edaboard. Follow this link:



S.

 

[steven_arnold_85]

binary generator

Thanks heaps guys It all helped me a lot