Proteus I.C. fan-out

I just started using Proteus 8 and I want to know more about the realism of the simulations, specifically in terms of fan-out in integrated circuits. I'm supposed to determine how many 74LS05's can a CD4011 support at it's output. I checked the datasheet for the 4011 and it doen't have max values for output currents, the typical values are of 0.88mA (IOH and IOL only differing in direction), and de minimal are of 0.44mA; and for the input of the 74LS05 they're 20uA (IIH) and 0.4mA (IIL), and they are max values. First I figured I should simply use IOL/IIL and IOH/IIH and pick the lesser of both, first I used the min values of the 4011 and the max of the 74LS05, to be safe since that would be the worst case scenario, and of course thar results in a rounded fan-out of 1 due to IIL/IOL = 0.44/0.4 = 1.1 of course when I did the simulation in proteus there was no problem and the 4011 could drive even 2 gates which is about the fan-out had I used the typical value for IOL instead of the minimum. However I kept adding gates and got to a total of 10 before coming here, because I don't know if I will ever reach a point where the 4011 is unable to drive the x number of 74LS05's, since the current at the output of 4011 seems to keep increasing way beyond the typical value... To sum it up: will I be able to reach a point where the 4011's output isn't able to drive the 74LS05's? I used a 5V VCC. Oh and are the values on datasheets for each gate or for all the gates in the I.C.? (I'm a begginer... I'll probably post that one on the basic concepts forum so don't answer it if it isn't necessary for the main question here please)

Although it is okay to mix CMOS & TTL & LS, I like the fact that CMOS runs on a range of supply voltage (example, 9V battery) with no need for a 5V regulator.

Looking through my Forrest Mims III Engineer's Notebook I found this (page 51):

"1 TTL output will drive up to 10 TTL or 20 LS inputs."
"1 LS output will drive up to 5 TTL or 10 LS inputs."

thanks for the information, but I think that that's pretty general, every individual circuit has a specified fan-out, given in U.L. which the has some factor I don't quite remember, but anyway my question was if Proteus takes that into acount, because according to the datasheets there is a maximum value for the fan-out, taking the ones you mention for example, let's say that a TTL drives 20 LS's, then my question is, will Proteus take that into acount or will I be able to drive a ton of LS's, say 50, without any issues in the simulation or any indication that I'm exceeding the capacity of the TTL driver?

According to datasheet specifications, a 5V supplied cd40xx can reliably drive one LS input.

I won't expect to get meaningful fan-out/fan-in simulation from Proteus. Like other SPICE based simulators, it uses a mixed-signal mode and doesn't fully model the analog properties of digital gates.

There's also a large gap between the worst case fan-out guaranteed over IC process, voltage and temperature ("PVT") variations and the typical results. Good design practice rdemands to refer to the first.