Pros and Cons of Switch-Capacitor Circuit

[jordan76]

Hi,

Sometimes we use switch-capaictor circuit techniques to design op-amp. Sometimes we don't.

Could anyone tell the pros and cons of switch-capacitor circuit?
Any input is welcome.

Thanks in advance!

 

[ezt]

Hi.
I think, the most important disadvantage of Switched-Capacitor circuits is that they should be used in two phase circuits. Always they need one phase (usually half clock period) for sampling. But there are lots of advantages for these structures which make them so popular in many applications. I think the most important one is CAPACITORS themselves. I mean, e.g. we produce a more exact gain with capacitor ratio which is very accurate in layout. Or we take the advantage of voltage restoration in Integrators and so on.

Regards,
EZT

 

[jordan76]

Hi ezt,

Thanks for your input!

If we do not consider the overhead of two-phase non-overlapping clock and suppose the gain accuracy is not very critical, what is the criterion of choosing opamp structure between sc circuitry and conventional method ?

regards,
jordan76

 

[yibinhsieh]

Usually, if I design a switch-capacitor filter, the common mode feedback of opamp is usually deisgned using switch capacitor technique.
Generally speaking, the switch-capacitor circuits can have very accurate RC time constamt becasue the R is implemented by the C. But the power consumption is usually larger than the transitional way because the OPs needs larger UGB.

Yibin.

 

[jordan76]

Thanks,yibinhsieh!

Another question: how to make sure the stability of CMFB circuitry? Also how to verity it? Thanks!

regards,
jordan76

 

[Vamsi Mocherla]

Dear jordan,

Normally we try to do a loop test on the CMFB loop with the main loop inputs put at the VMID voltage which is VDD-VSS/2. Hence you try to measure the loop gain and loop phase margin.

But in the case of switched capacitor CMFB, as long as the settling time of the switches is quite reliable in the clock rates, the CMFB is unconditionally stable.

 

[winsonpku]

what is the meaning of "the switch-capacitor circuits can have very accurate RC time constamt becasue the R is implemented by the C".you mean the capacitor can be seen as open from the dc point?

Usually, if I design a switch-capacitor filter, the common mode feedback of opamp is usually deisgned using switch capacitor technique.
Generally speaking, the switch-capacitor circuits can have very accurate RC time constamt becasue the R is implemented by the C. But the power consumption is usually larger than the transitional way because the OPs needs larger UGB.

Yibin.

Added after 3 minutes:

can you post a specified case for testing the settling time of an sc circuits,hspice simulated file maybe prefered.thanks first!

Dear jordan,

Normally we try to do a loop test on the CMFB loop with the main loop inputs put at the VMID voltage which is VDD-VSS/2. Hence you try to measure the loop gain and loop phase margin.

But in the case of switched capacitor CMFB, as long as the settling time of the switches is quite reliable in the clock rates, the CMFB is unconditionally stable.