Thanks, are just as the original one.Gandalf_Sr said:I tested mine. I put in a 10k pot between on the DPOT connection in your diagram and turned it end to end. My Vpp ranged from 10.2 to 14.8 V and my L is 150uH
Thankstogarha said:folk,
Yes, the pic automatically adjusts DPOT according to the value at RA3...
My board is manually routed. It was a 2-3 night job.ender84567 said:@potyo, how do you get such a nice looking board out of eagle? i used your schematic, made some changes, added an extra pin header, and i used the autoroute (using almost an identical placing) and i got something very ugly looking, how is yours so awesome?
potyo said:My board is manually routed. It was a 2-3 night job.
The older cmos chips are also enough fast for icd2.ender84567 said:Has anyone had any problems with the 74 family logic, specifically with mixing ls with HC and HCT? it looks like from the schematic that i could use whatever, but i suppose the older cmos is slower and could cause timing errors.
potyo said:It should work.
Thanks.potyo said:
Again yes.folks said:My final question, your firmwares includes the configuration bits?
potyo said:Again yes.folks said:My final question, your firmwares includes the configuration bits?
cyrillic said:Are you sure it works? I found a piece of groundplane in the middle of the top half, right below R48, that isn't connected to the rest of the plane. I think it grounds two cap's through pin 4 of the MCP41010.
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