Programming Chips in Parallel

[Hawaslsh]

Hello all,


I am working with 2 Analog Device chips: ADF4159 and ADF5901. The two have different digital voltage levels: 1.8 and 3.3V respectively. Till now I have been programming them individually. Using different ports from the microcontroller, I could set up individual voltage dividers to deal with the different voltage levels (simplified diagram above)

Now I need to simply the schematic and squeeze everything down in size, so i want to parallelize some of the programming of the two chips. Perhaps this is super obvious, but I just want to make sure. Would it be as simple as just using a voltage divider with 3 resistors?

In regards to the registers' input impedance, the datasheet for the chips mentions "This input is a high impedance CMOS input". I assume this statement is why the original voltage dividers worked, and why this one should too?

Thanks in advance

 

[barry]

I would be a little concerned about capacitance. What speed are your signals? Driving into the RC formed by your 1Ks might be a problem. Also, verify that your uC can drive a 3K load.

 

[KlausST]

Hi,

You mix two different things:
* power supply voltage
* digital signal voltage levels. V_IH, V_Imax

LOW level is not the problem at all.
HIGH level 1.4V ... 2.1V is valid for both ICs.
So a single voltage divider will work. For high speed signals I recommend a 1.8V supplied logic buffer (CMOS) which is 5V input tolerant.

Klaus

Added:
5V powered analog switches SPDT will also work. NC to GND, NO to 1.8V.
(Break-before-make)

 

[Hawaslsh]

Hi,
HIGH level 1.4V ... 2.1V is valid for both ICs.

I thought about this idea, however, I was worried a divider which produces 1.6V (2K and 1K) would be cutting it close for the 1.4V minimum for the ADF5901. Assuming worst case, and my resistors are 10% off, 2200 and 900, that would very close to 1.4V. I suppose I could make a divider using different resistors, but the point was to reduce everything, from cost, area, and parts on BOM.

Thanks for the advice!

- - - Updated - - -

I would be a little concerned about capacitance. What speed are your signals? Driving into the RC formed by your 1Ks might be a problem. Also, verify that your uC can drive a 3K load.

The u-controller is the Atemga328p. The max I/O current is 40 mA, so I assume 5/3 mA should be OK?

Regards to the RC, never considered that. One major problem, I am relying on 3rd party software (Arduino) to do the actual SPI communication. So, other than specifying a communication speed, 20 MHz, I am flying blind. What I do know, the input capacitance to the ADF chips is 10 pF. Worst case 2K in series 10 pF, 20 ns (50 MHz). 50 MHz is faster than 20 Mhz (rather the delay is shorter than communication speed), is that what I should worried about?

bonus help:

As I mentioned, I am relying on other people's software to write to the chips, so the timing diagram is somewhat a mystery to me. I've spent a little time looking, but what is the unit (ns min)? Google keeps giving me ways to convert nanoseconds to minutes

Thanks again!
Both you and KlousST are impeccable human beings

 

[FvM]

Read the Arduino library help thoroughly, no reason to fly blind. SPI speed isn't critical with AVR, no chance to exceed the ADF maximum.

Resistive level translation basically works, but clock edge must be fast enough to avoid detection of false clock pulses by the receiver.