:?: Does anybody know any sites regarding the protocol on Programming CPLD's/FPGA's? (I mean, relating the signals of the *.pof with the signals on the JTAG)
:!: I am developing a board now with Altera's EPF10K. This board has a USB interface. And I am thinking that I might change the program, in the future, on the EEPROM of the EPF10K. So I'm planning to develope a software to download the *.pof to the EEPROM.
You can find all information about configuring Altera FPGAs and CPLDs in the “Configuration Handbook” (**broken link removed**). What kind of EEPROM holds the configuration data in your design?