Dear researchers;
I started to carry out a monte-carlo simulation for an Operational Amplfier in TSMC 65nm technology with Cadence Virtuoso. In this way, I added relevant model libraries, so MC simulation proceeded successfully. However, I need to know process fluctuation parameters of CMOS and their variations defined in the TSMC model, like sigma (Vth), sigma (W/L), etc.—noting that referring to the TSMC PDK reference manual did not yield beneficial results.
Sincerely