Procedure for transforming VHDL to ASIC

[OvErFlO]

What I need to trasform my Vhdl Digital design to a ASIC IC project ?
Anyone can say me, this procedure and what's the software that I can use ?

Thanks

 

[brmadhukar]

Re: Vhdl to ASIC

You can choose from two options. 1. Convert it to EDIF (prefferably. 2.0) netlist and follow EDIF to GDSII ASIC flow. 2. Directly synthesise your VHDL RTL in any ASIC synthesi tool and follow RTL to GDSII design flow.

Synopsys tools

 

[OvErFlO]

Re: Vhdl to ASIC

Can you describe me process and tools that I can use ???
What's software to convert EDIF to GDSII Asic and VHDL to GDSII? Can I use Cadence IC5033 to do this works ?


Thanks... ;-)

 

[sandusty]

Vhdl to ASIC

VHDL (RTL) --> synopsys dc -- > VHDL, Verilog (gate level)

Gate Level --> Cadence SE / Synopsys Astro(milkyway) --> GDSII or

VHDL (RTL) --> magma --> GDSII

GDSII needs to be translated to masks then send to fundries and make chips