[SOLVED] Problems with Inverter

Code C - [expand]
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#define f 400
#define spc 24
#define adj 6
#define Phase1L PORTC.0
#define Phase1H PORTC.1
#define Phase2L PORTC.2
#define Phase2H PORTC.3
#define Phase3L PORTC.4
#define Phase3H PORTC.5
 
flash unsigned char PWMCodes[721]={0,0,4,9,13,18,22,27,31,35,40,44,49,53,57,62,66,70,75,79,83,87,91,96,100,104,108,112,116,120,124,127,131,135,139,143,146,150,153,157,160,164,167,171,174,177,180,183,186,190,192,195,198,201,204,206,209,211,214,216,219,221,223,225,227,229,231,233,235,236,238,240,241,243,244,245,246,247,248,249,250,251,252,253,253,254,254,254,255,255,255,255,255,255,255,254,254,254,253,253,252,251,250,249,248,247,246,245,244,243,241,240,238,236,235,233,231,229,227,225,223,221,219,216,214,211,209,206,204,201,198,195,192,190,186,183,180,177,174,171,167,164,160,157,153,150,146,143,139,135,131,128,124,120,116,112,108,104,100,96,91,87,83,79,75,70,66,62,57,53,49,44,40,35,31,27,22,18,13,9,4,0,4,9,13,18,22,27,31,35,40,44,49,53,57,62,66,70,75,79,83,87,91,96,100,104,108,112,116,120,124,127,131,135,139,143,146,150,153,157,160,164,167,171,174,177,180,183,186,190,192,195,198,201,204,206,209,211,214,216,219,221,223,225,227,229,231,233,235,236,238,240,241,243,244,245,246,247,248,249,250,251,252,253,253,254,254,254,255,255,255,255,255,255,255,254,254,254,253,253,252,251,250,249,248,247,246,245,244,243,241,240,238,236,235,233,231,229,227,225,223,221,219,216,214,211,209,206,204,201,198,195,192,190,186,183,180,177,174,171,167,164,160,157,153,150,146,143,139,135,131,128,124,120,116,112,108,104,100,96,91,87,83,79,75,70,66,62,57,53,49,44,40,35,31,27,22,18,13,9,4,0};
 
void main(void)
{
unsigned char i=0,j=0,k=0;
DDRA=0x00;
DDRB=0x13;
DDRC=0x3F;
DDRD=0x10;
 
TCCR0=0x69;
TCCR1A=0x81;
TCCR1B=0x09;
TCCR2=0x69;
TCCR3A=0x81;
TCCR3B=0x09;
 
OCR0=0x00;
OCR1A=0x00;
OCR1B=0x00;
OCR2=0x00;
OCR3AH=0x00;
OCR3AL=0x00;
OCR3BH=0x00;
OCR3BL=0x00;
 
while (1)
      {
      
      for (i=0;i<spc;i++)
          {
            j=i+8;
            k=i+16;
            if(i<12)
            {
            Phase1L=0;
            Phase1H=1;
            }
            else
            {
            Phase1H=0;
            Phase1L=1;
            }
 
            if((j>11)&&(j<24))
            {
            Phase2H=0;
            Phase2L=1;
            }
            else
            {
            Phase2L=0;
            Phase2H=1;
            }
 
            if((k>23)&&(k<36))
            {
            Phase3L=0;
            Phase3H=1;
            }
            else
            {
            Phase3H=0;
            Phase3L=1;
            }
            OCR0=PWMCodes[(i+1)*(360/spc)];     // Output Phase#1 (OCR0)
            OCR3AL=PWMCodes[(j+1)*(360/spc)]; // Output Phase#2 (OCR3A)
            OCR2=PWMCodes[(k+1)*(360/spc)];   // Output Phase#3 (OCR2)
            delay_us((1000000/(f*spc))-adj);
          };
 
 
      };
}