[SOLVED] Problem with MOSFET driver driving output

[FreshmanNewbie]

I'm using this MOSFET driver IC.

Below is the schematic of the high side:



I followed figure 6-3 and 6-5 for the ICs schematics connections.

I have not populated the LED branches off of the gate outputs on all of the drivers (high side and low side). One thing I noticed in capturing this data was that the Vboost signal starts where it is supposed to be (~37V) but then drops down to near system voltage (~24V) and never recovers to what it should be after the first pulse. This seems to me to be the root of this issue however I am not sure how to address it. I would imagine that the voltage at the Vboost pin should recover back up to the ~37V it was before the input pulses started.
These screenshots were taken with a 2.7nF boost capacitor. I had tried the configuration previously mentioned with 10nF as the boost capacitor connected to Vdd. The first few cycles were elevated but they decayed quickly to the system voltage (i.e no boost). So it looks like it helped a little with the boosting but ultimately decayed in the same way the 2.7nF boost capacitor did.
I have noticed that while this circuit runs in its current state, the high side MOSFET is getting warm quickly during operation, likely due to a weak turn on voltage not turning the MOSFET on all the way.

There is a drawing to show the voltage across the load. I am currently using a 1.8 ohm resistor to simulate the load that will be present in the final application, a 24VDC brushless DC motor. Since it is a 1.8 ohm resistor, the load current was determined by dividing the voltage pulse amplitude by the resistance. Since the signal is ~50% duty cycle the practical current would actually be half of that calculated result.

 

[KlausST]

Hi,

do you think it´s a good idea to post a schematic without part values?
We can not calculate any voltage / current...

I followed figure 6-3 and 6-5 for the ICs schematics connections.

Where is the idea from to put a LED at the gate drive output?
Neither Fig 6-3 nor Fig 6-5 shows this.

--> Do the test like Fig3-2 and/or 3-6 (without LED) and see what happens.


Klaus

 

[danadakk]

Whats the MOSFET part number, and value of R1 ?

As stated earlier a schematic with values and part numbers minimal
needed to get insight.

You seem to have ~ 3V drive for MOSFET Turnon, is that the Vgs spec at Rdson spec for the MOSFET ?
Seems like, not knowing part number, thats a marginal or inadequate spec to get the MOSFET
hard on = fry eggs time for the MOSFET.


Regards, Dana.

 

[betwixt]

I'm not sure what your schematic is supposed to do. VBOOST has to raise the gate voltage higher than the source voltage so if you are 'high side' driving as noted in your schematic, it has to be higher than whatever the source pin is connected to. The idea is the side of the capacitor away from the IC is driven with the signal at the output of the MOSFET so it 'lifts' up as the source voltage rises. In a normal high side configuration the source pin in question will be the output node of the switch, if you are grounding or not allowing the source to carry signal it will not work with exactly the symptoms you describe.

What exactly is H_S3 connected to?

Brian.

 

[KlausST]

Hi,

Indeed while you claim to followed the datasheet ...
..there are a couple of items where you did not follow the datasheet.

--> follow the datasheet and your circuit will work.

The manaufacturer made this datasheet to support you, to show you how things work.
They do this for you to get good results.
... and in turn they expect that you design in their product .. and they sell a lot of them.

Klaus

 

[barry]

Since the signal is ~50% duty cycle the practical current would actually be half of that calculated result.

The signal is most certainly NOT 50% duty cycle.

 

[stenzer]

Hi,

as @barry pointed out, that's not a 50% duty cycle, its about 12.5%. Further, the datasheet states a duty cycle range of 2% to 100% @ 5 kHz at its frontpage. You are operating the IC with a frequency of ~31.25 kHz. Have you tried to reduce the frequency?

This issue sounds quite familiar to me, have you or someone else, already asked almost the same question in this forum, not that long ago?

BR

 

[FreshmanNewbie]

Hi,

as @barry pointed out, that's not a 50% duty cycle, its about 12.5%. Further, the datasheet states a duty cycle range of 2% to 100% @ 5 kHz at its frontpage. You are operating the IC with a frequency of ~31.25 kHz. Have you tried to reduce the frequency?

This issue sounds quite familiar to me, have you or someone else, already asked almost the same question in this forum, not that long ago?

BR

Thank you for your answer. Could you tell me how you are telling the duty cycle is around 12.5% and how the frequency is 31.25kHz? Please let me know how you found out?

 

[barry]

Thank you for your answer. Could you tell me how you are telling the duty cycle is around 12.5% and how the frequency is 31.25kHz? Please let me know how you found out?

Seriously?
How did YOU come to the conclusion it was 50% duty cycle? Duty cycle is on-time vs total cycle time.

Frequency is 1/total cycle time.

 

[stenzer]

Thank you for your answer. Could you tell me how you are telling the duty cycle is around 12.5% and how the frequency is 31.25kHz? Please let me know how you found out?

Your scope time resolution is set to 20us per devision. The elapsed time from one rising edge to the next is about 32us, which is your frequency's cycle time (period time). Frequency is defined by 1/cycle-time.

Duty cycle is defined as on-time (signal is high) divided by the cycle-time.

BR

 

[danadakk]

For the visual learners....