[SOLVED] Problem with LCD(JHD162A) interfacing with PIC18f25K22 microcontroller

#pragma config FOSC = INTIO67   // Oscillator (LP,XT,HSHP,HSMP,RC,RCIO6,ECHP,    //INTIO7
                                //  ECHPIO6,INTIO67,INTIO7,ECMPIO6,ECLP,ECLPIO6)
#pragma config PLLCFG = OFF     // 4X PLL Enable
#pragma config PRICLKEN = OFF   // Primary clock enable
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable
#pragma config IESO = OFF       // Internal/External Oscillator Switchover

// CONFIG2L
#ifdef __DEBUG
    #pragma config PWRTEN = OFF // Power-up Timer Enable
#else
    #pragma config PWRTEN = ON
#endif
#pragma config BOREN = SBORDIS      // Brown-out Reset Enable  (OFF,ON,NOSLP,SBODIS)
#pragma config BORV = 190       // Brown Out Reset Volt.(285,250,220,190)[V/100]

// CONFIG2H
#pragma config WDTEN = OFF     // Watchdog Timer Enable (OFF,NOSLP,SWON,ON)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC1  // ECCP2 B output mux (PORTB3, PORTC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable
#pragma config CCP3MX = PORTB5  // CCP3 MUX (PORTB5, PORTC6)
//#pragma config HFOFST = ON      // HFINTOSC Fast Start-up
#pragma config T3CMX = PORTC0   // Timer3 Clock input mux (PORTB5,PORTC0)
#pragma config P2BMX = PORTB5   // ECCP2 B output mux (PORTB5,PORTC0)
#ifdef __DEBUG
   #pragma config MCLRE = EXTMCLR  // MCLR Pin Enable (MCLR / RE3)
#else
   #pragma config MCLRE = INTMCLR
#endif

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable
#pragma config LVP = OFF        // Single-Supply ICSP Enable
#pragma config XINST = OFF      // Extended Instruction Set Enable

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection Block 0
#pragma config CP1 = OFF
//#pragma config CP2 = OFF
//#pragma config CP3 = OFF

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection
#pragma config CPD = OFF        // Data EEPROM Code Protection

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection Block 0
#pragma config WRT1 = OFF
//#pragma config WRT2 = OFF
//#pragma config WRT3 = OFF

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection
#pragma config WRTB = OFF       // Boot Block Write Protection
#pragma config WRTD = OFF       // Data EEPROM Write Protection

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection Block 0
#pragma config EBTR1 = OFF
//#pragma config EBTR2 = OFF
//#pragma config EBTR3 = OFF

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection*/

void hw_init()
{	
	
    //OSCCON = 0x3C;
    //OSCCON2 = 0x06;
    
	//PORTA =0x00;
    //LATA =0x00;
	//ANSEL = 0x00;
	//ANSELH = 0x00;
	TRISA=0x00;//  LCD O/P
	TRISB=0xEF;
	TRISC=0x80;
	
		ANSELA = 0X00;
        ANSELB = 0X00;
        ANSELC = 0X00;
        C1ON = 0;
        C2ON = 0;
        CM1CON0 =0X00;
        CM2CON0 = 0X00;
        CCP1CON = 0x00;
        CCP2CON = 0x00;
        CCP3CON = 0x00;
        CCP4CON = 0x00;
        CCP5CON = 0x00;
        VREFCON1 =0X00;
        VREFCON2 =0X00;
        VREFCON0 =0X00;
       // CVREN =0;
        //CVRCON = 0x00;
        CM1CON = 0x00;
        //CANCON =0X00;
        
	INTCON=0x00;    //Disable interrupts
	//OPTION |= 0x0F;	//1:2 prescaler			// PRESCALAR TO 1:256, WATCH DOG ENABLE ON 25-01-2013
	
//	OPTION_REG = 0x00;	//1:2 prescaler
	T0IE = 1;	//temporarily disable Timer0 interrupt 		// TIMER ENABLED ON 25-01-2013

//	WPUB=0xF0;//WEAK PULL-UP
//	IOCB=0x00;//INTERRUPT ON CHANGE
//	RBPU=0;	// PORTB PULLUP ENABLE
//	nRBPU=0;	// PORTB PULLUP ENABLE
		
	//TIMER
	T1CON=0x00;
	//TMR1CS=0;	//INTERNAL TIMER1 CLOCK
	T0CS=0;		//Timer0
	T2CON=0x7A;	//TIMER2(1:16 prescaler and 1:16 postscaler)
	CLRWDT();
	BRGH1 = 1;
	BRG161 =0;
	SPBRG =0x19;	// TO GENERATE BAUDRATE = 9600
	SPBRGH=0x00;
	SYNC1 = 0;	//ASYNCHRONOUS MODE
	SPEN1 = 0;	// SERIAL PORT ENABLE
	TXEN1=1;
	CREN1=1;
	TXIF=0;
	RCIF=0;