Monady
Advanced Member level 4
Hi dear all friends;
I've designed a flash ADC and now i want to test it. but i've some problems with INL/DNL calculation due to the using of THA!
i used of track and hold amplifier (THA; a track and hold which is followed by a source follower as a buffer), besides
input of ADC is (Vin+)-(Vin-)=500mV and output of THA is (VO+)-(VO-)=480mV
in the resistor ladder i used of two reference voltages which is defined as follow:
(Vref+)-(Vref-)=500mV
in this situation some digital codes will not be produced (e.g. 000...0 or 1111....1), for example in the output of Hspice, i have only 248 digital codes for 8-bit ADC instead of 256 codes.
Now what can i do for INL/DNL calculation
Thx in advance.
I've designed a flash ADC and now i want to test it. but i've some problems with INL/DNL calculation due to the using of THA!
i used of track and hold amplifier (THA; a track and hold which is followed by a source follower as a buffer), besides
input of ADC is (Vin+)-(Vin-)=500mV and output of THA is (VO+)-(VO-)=480mV
in the resistor ladder i used of two reference voltages which is defined as follow:
(Vref+)-(Vref-)=500mV
in this situation some digital codes will not be produced (e.g. 000...0 or 1111....1), for example in the output of Hspice, i have only 248 digital codes for 8-bit ADC instead of 256 codes.
Now what can i do for INL/DNL calculation
Thx in advance.