Problem with configuring XC95108 CPLD

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CPLD configuring Problem

hi all
while XC95108(one of xilinx's CPLD as u know)configuring ,iMPACT detect device but
said XC95108-unsuppoerted and then i can not program with my .JED file.
i have assigned my .JED file but when i want to program XC95108 the following ERROR is appeare
the IDCODE which get from your device is not match to expected IDCODE
... and anything like this error
any comment or idea?
tnx in advance
 

Re: CPLD configuring Problem

Hi,

I had the same problem with the same chip. It was on board manufactured
3 or 4 year ago. The chip was an early version with low ID, manufactured in 1999. I made test with a brand new board with a chip manufactured in 2002 and I got no problem, everything worked well. So, check the date code of your chip. If it is an early version, you have two solutions :

1. Replace your chip with one with a more recent date code or,

2. Try to find old Xilinx's jtag programming tools anywhere. This could be not where easy.

Regards
 

CPLD configuring Problem

I am working with CPLD XC95108 with ISE6.2 and do not have any problem with making JED file. I thinh that you have consider the tools you are using. If you use ISE, you have to check the version of ISE because
each of ISE version only support some chips.
Go to the xilinx site to download the newest ISE version

Bye
 

Re: CPLD configuring Problem

You can also contact Xilinx and open a web case they are very helpful
 

Re: CPLD configuring Problem

I had the same problem when I programed the XC95108TQ100 on an old board with parallel III cable in ISE6.2. I resolved the problem with myself-made parallel III cable which driving abibility is more strong.
 

Re: CPLD configuring Problem

the IDCODE which get from your device is not match to expected IDCODE ,
the error appears when the name of your component is not match
the component name of porject,as you know we have two type of cpld libray
xc95XX and XC95xx xl,if you select one of them with fault.this error appears.
if the error cosist of the ...position'0' may be problem with your supply.
can your system detect the jtag programmer port?
 

Re: CPLD configuring Problem

Hi,

The problem is describded on Xilinx site. See here for a workarround proposal :

h**p://support.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=13529

* = t
 

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