problem using AVALON_MM interface of TSE

[sawaak]

HI,

I am trying to configure Altera TSE MAc using Avalon MM interface (without using SOPC).

I am trying to write the scratch register (address 8'h01) with 32'haaaaaaaa but not successful as waitrequest signal is high throughout simulation...

I am providing 50 MHz clk for Avalon-MM interface and 125MHz clk for ff_tx_clk, ff_rx_clk, tx_clk, rx_clk.

Also when Analysis and Elaborating the project using Quartus II 10.1, got the warning "Warning (10236): Verilog HDL Implicit Net warning at altera_tse_rx_stat_extract.v(112): created implicit net for "reset_rx_clk"". How to resolve this warning as it is in encrypted file..





Regards,
Sawaak

 

[shitansh]

HI,

To check if is there any problem in encrepted file of TSE MAC, you can quickly make Sopc design with NiosII processor. Next you need to do NiosII to Modelsim simulation that way you can check it and resolve it.

HTH,
Shitansh Vaghela

 

[sawaak]

Hi,

Thanks for the reply...I am new to Altera and never used SOPC before...anyway the problem is solved, there was mistake in readdata and read signal connections..


thanks
sawaak

 

[liuyong]

HI!sawaak！how do you solve this problem? i meet this problem and can't resolve it for a long time. i search the internet everywhere but only find you have solved it,i will appreciate it if you can give me some suggestions,thank you very much!